Technical Program

Paper Detail

Paper:DISPS-P3.2
Session:High Performance DSP Architectures and Systems
Time:Friday, May 21, 13:00 - 15:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Hardware, Software, and Algorithm Tradeoffs and Integration
Title: A SOFTWARE / HARDWARE CODESIGNED HANDS FREE SYSTEM ON A "RESIZABLE" BLOCK-FLOATING-POINT DSP
Authors: Shiro Kobayashi; Asahi Kasei Corporation 
 Isamu Kozuka; Asahi Kasei Corporation 
 Wai Hung Tang; Asahi Kasei Corporation 
 Diemo Landmann; Asahi Kasei Corporation 
Abstract: A hands free telephone application has been implemented on a low-cost, custom-configured, block-floating-point digital signal processor (DSP). The application consists of an acoustic echo canceller and a spectral subtraction (SS) based noise suppressor. The objective of pursuing a custom configuration was the minimization of hardware cost for the given application. For this objective, implementation has been carried out though a software / hardware codesign design flow on a resizable DSP platform. The intention of exploiting block-floating-point as arithmetic was to remove the burden of time-consuming fixed-point model development, while employing an inexpensive fixed-point DSP. This paper describes an implementation of the application. Signal processing quality evaluation results are also presented for some critical computation modules in the application.
 
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