| Paper: | DISPS-L2.1 | ||
| Session: | DSP for Communication and Coding | ||
| Time: | Friday, May 21, 15:30 - 15:50 | ||
| Presentation: | Lecture | ||
| Topic: | Design and Implementation of Signal Processing Systems: Algorithm Transformation and Mapping Techniques | ||
| Title: | INTERLEAVED TRELLIS CODED MODULATION AND DECODING FOR 10 GIGABIT ETHERNET OVER COPPER | ||
| Authors: | Yongru Gu; University of Minnesota | ||
| Keshab Parhi; University of Minnesota | |||
| Abstract: | It is highly likely that 10 Gigabit Ethernet over copper (10GBASE-T) transceivers will use a 10-level pulse amplitude modulation (PAM10) as well as a 4D trellis code as in 1000BASE-T.Traditional trellis coded modulation scheme as in 1000BASE-T leads to a design where the corresponding decoder with a long critical path needs to operate at 833MHz. It is difficult to meet the critical path requirements of such a decoder. To solve the problem, two interleaved trellis coded modulation schemes are proposed. The inherent decoding speed requirements are relaxed by factors of 4 and 2, respectively. Parallel decoding of the interleaved codes requires multiple decoders. To reduce the hardware overhead, time-multiplexed or folded decoder structures are proposed where only one decoder is needed and each delay in the decoder is replaced with four delays for scheme 1 and two delays for scheme 2, respectively. These delays can be used to reduce the critical path. Compared with the conventional decoder, the folded decoders for the two proposedschemes can achieve speedups of 4 and 2, respectively. Simulation results show that the error-rate performances of the two schemes are quite close to that of the conventional scheme. | ||
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