DISPS-P2: Fast Algorithms |
Session Type: Poster |
Time: Friday, May 21, 09:30 - 11:30 |
Location: Poster Area 5 |
Chair: , |
DISPS-P2.1: HARDWARE ARCHITECTURE AND VLSI IMPLEMENTATION OF A LOW-POWER HIGH-PERFORMANCE POLYPHASE CHANNELIZER WITH APPLICATIONS TO SUBBAND ADAPTIVE FILTERING |
Yongtao Wang; Purdue University |
Hamid Madmoodi; Purdue University |
Lih-Yih Chiou; Purdue University |
Hunsoo Choo; Purdue University |
Jongsun Park; Purdue University |
Woopyo Jeong; Purdue University |
Kaushik Roy; Purdue University |
DISPS-P2.2: AUTOMATIC GENERATION OF IMPLEMENTATIONS FOR DSP TRANSFORMS ON FUSED MULTIPLY-ADD ARCHITECTURES |
Yevgen Voronenko; Carnegie Mellon University |
Markus Püschel; Carnegie Mellon University |
DISPS-P2.3: A REGULAR ALGORITHM FOR REAL TIME RADON & INVERSE RADON TRANSFORM |
Abhishek Mitra; Indian Institute of Technology, Kharagpur |
Swapna Banerjee; Indian Institute of Technology, Kharagpur |
DISPS-P2.4: COMPLEXITY REDUCTION AND REGULARIZATION OF A FAST AFFINE PROJECTION ALGORITHM FOR OVERSAMPLED SUBBAND ADAPTIVE FILTERS |
Edward Chau; Dspfactory Ltd. |
Hamid Sheikhzadeh; Dspfactory Ltd. |
Robert Brennan; Dspfactory Ltd. |
DISPS-P2.5: ON A PRACTICAL DESIGN OF A LOW COMPLEXITY SPEECH RECOGNITION ENGINE |
Marcel Vasilache; Nokia Research Center |
Juha Iso-Sipilä; Nokia Research Center |
Olli Viikki; Nokia Research Center |
DISPS-P2.6: OPTIMIZING THE JPEG2000 BINARY ARITHMETIC ENCODER FOR VLIW ARCHITECTURES |
Brian Valentine; Morgan State University |
Oliver Sohm; Texas Instruments, Inc. |
DISPS-P2.7: OPTIMUM ADDRESS POINTER ASSIGNMENT FOR DIGITAL SIGNAL PROCESSORS |
Bernhard Wess; Vienna University of Technology |
Thomas Zeitlhofer; Vienna University of Technology |
DISPS-P2.8: SHIP-MOTION PREDICTION: ALGORITHMS AND SIMULATION RESULTS |
George Zhao; Intelligent Automation, Inc. |
Roger Xu; Intelligent Automation, Inc. |
Chiman Kwan; Intelligent Automation, Inc. |
DISPS-P2.9: FAST TWO-LEVEL-DYNAMIC-PROGRAMMING ALGORITHM FOR SPEECH RECOGNITION |
Akakpo Agbago; University of Ottawa |
Caroline Barriere; National Research Council of Canada |
DISPS-P2.10: MATRIX FORMULATION: FAST FILTER BANK |
Yong Ching Lim; Nanyang Technological University |
Jun Wei Lee; National University of Singapore |
DISPS-P2.11: EFFICIENT ALGORITHMS FOR COMMON SUBEXPRESSION ELIMINATION IN DIGITAL FILTER DESIGN |
Fei Xu; Nanyang Technological University |
Chip Hong Chang; Nanyang Technological University |
Ching Chuen Jong; Nanyang Technological University |
DISPS-P2.12: NEW MODULO DECOMPOSED RESIDUE-TO-BINARY ALGORITHM FOR GENERAL MODULI SETS |
Shaoqiang Bi; Concordia University |
Wei Wang; University of Western Ontario |
Asim Al-Khalili; Concordia University |
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